Chapter 4: Computer Organization and Architecture (Set-4)
In basic computer organization, which unit mainly translates internal binary results into human-readable form on devices
A Output unit
B Input unit
C Control unit
D Memory unit
The output unit converts processed binary results into a form humans can understand, like text, images, or sound. Devices such as monitors and printers present these results to the user clearly.
When a scanner converts a paper image into digital form for the computer, it is acting as part of the
A Output unit
B Control unit
C Input unit
D Memory unit
A scanner captures information and converts it into digital signals. As an input device, it feeds data into the computer for storage or processing, similar to a keyboard or mouse.
Which component is responsible for temporary high-speed storage of operands used immediately in CPU operations
A Hard disk
B Registers
C Optical drive
D Printer buffer
Registers are tiny storage locations inside the CPU that hold operands, addresses, and intermediate results. Their very fast access helps the CPU execute instructions efficiently without frequent memory delays.
Which CPU register is most directly used to keep the address for the next instruction fetch during execution
A Accumulator
B Instruction Register
C Memory Data Register
D Program Counter
The Program Counter stores the address of the next instruction to be fetched from memory. It updates after each fetch, or changes to a branch target during jumps, calls, or interrupts.
Which register holds the instruction currently being decoded and executed by the control unit
A Instruction Register
B Memory Address Register
C Memory Data Register
D Stack Pointer
The Instruction Register holds the fetched instruction so the control unit can decode its opcode and operands. This enables correct generation of control signals and proper execution steps.
In memory operations, which register contains the memory location address that the CPU wants to access
A MDR
B IR
C MAR
D PC
The Memory Address Register stores the address of the memory location to read from or write to. It ensures the CPU accesses the correct memory cell during instruction and data operations.
Which register commonly holds the data value being read from memory or written back to memory
A MAR
B PC
C CU
D MDR
The Memory Data Register temporarily holds the actual data during memory transfers. On a read, memory loads data into MDR; on a write, MDR provides the data that memory stores.
Which ALU activity is an example of a logical operation rather than arithmetic
A Adding two numbers
B Subtracting values
C Comparing equality
D Multiplying values
Logical operations include comparisons and Boolean logic like AND/OR. Equality comparison checks whether two values match and sets status flags, which helps control conditional branching in programs.
Which unit generates and sends control signals needed to move data between registers and perform operations
A Control unit
B Output unit
C RAM
D Hard disk
The control unit decodes instructions and produces control signals for registers, ALU, memory, and I/O. These signals control timing and sequencing so each instruction executes correctly step by step.
Which statement best describes the “data path” inside a CPU
A Internet connection line
B Hardware data routes
C Printer ink channel
D Speaker wire path
The datapath includes registers, ALU, internal buses, and related circuits that carry and process data. Control signals decide which paths are used during instruction execution and data transfers.
Which bus carries the actual data bits between CPU, memory, and I/O devices
A Address bus
B Control bus
C Power bus
D Data bus
The data bus transfers real data values and instruction bits. Its width affects how many bits can be transferred at once, influencing overall data throughput in memory and device communication.
Which bus carries the location information needed to access a specific memory cell
A Data bus
B Control bus
C Address bus
D Audio bus
The address bus carries memory addresses from the CPU to memory or I/O. It selects the target location for read or write operations, and its width affects maximum addressable memory.
Which bus carries signals like memory read, memory write, and interrupt request
A Control bus
B Address bus
C Data bus
D USB bus
The control bus carries command and timing signals that coordinate operations among CPU, memory, and I/O. Signals like read/write and interrupts ensure devices act at the correct time and direction.
Which unit in a computer is mainly designed to store data permanently for later use
A Registers
B Secondary storage
C Cache memory
D ALU
Secondary storage devices like SSDs and HDDs store data permanently, keeping files even when power is off. They offer large capacity but are slower than RAM and cache memory.
Which memory level is usually faster than RAM but slower than CPU registers
A Hard disk
B Optical disk
C Cache memory
D Tape drive
Cache is a small, fast memory placed close to the CPU. It stores frequently used data and instructions to reduce average memory access time, making processing faster than using RAM alone.
Which memory type loses its content when power is turned off
A ROM
B SSD
C Flash ROM
D RAM
RAM is volatile memory used as main working storage for running programs. It provides fast access, but its content disappears when the system is powered down, unlike ROM or SSD.
Which memory type commonly stores firmware such as BIOS/UEFI code
A ROM
B RAM
C Cache
D Registers
Firmware is stored in non-volatile ROM so it remains available at startup. It initializes hardware and begins the boot process before the operating system is loaded into RAM.
Virtual memory mainly helps when
A Cache is full
B Monitor is large
C RAM is insufficient
D CPU is idle
Virtual memory uses disk space as an extension of RAM by swapping pages between disk and RAM. It allows larger programs to run, though access becomes slower than true RAM.
Memory access time generally refers to
A Screen refresh delay
B Time to read/write
C Keyboard typing speed
D Disk storage size
Access time is the delay needed to complete a memory read or write operation. Lower access time means faster retrieval of data, which improves CPU efficiency by reducing waiting periods.
Memory bandwidth is best described as
A Data transfer rate
B Storage capacity total
C CPU temperature rise
D Instruction length size
Bandwidth is the amount of data memory can transfer per unit time, such as GB/s. Higher bandwidth supports faster block transfers and reduces delays during large data movement.
In the instruction cycle, which step loads the next instruction from memory into the CPU
A Decode
B Execute
C Fetch
D Store
Fetch reads the next instruction from memory using the Program Counter address. The instruction is placed into the Instruction Register so the CPU can decode and execute it in later steps.
During decoding, the CPU mainly identifies
A Disk file names
B Monitor pixel depth
C Printer page size
D Opcode meaning
Decode determines what operation the instruction requests by interpreting the opcode and operand fields. The control unit then plans the micro-operations and issues control signals to execute correctly.
The execute stage of an instruction often involves
A Instruction printing
B Screen calibration
C ALU operation
D Disk cleanup
Execute performs the instruction’s main work, such as arithmetic, logic, memory access, or branching. The ALU and registers typically take part, guided by control signals from the control unit.
The store or write-back stage usually means
A Saving result output
B Powering off CPU
C Clearing cache lines
D Formatting memory blocks
Write-back stores results into a destination register or memory location. This updates the system state so later instructions can use the computed result, completing the instruction cycle.
A clock cycle is best understood as
A One program run
B One timing tick
C One disk sector
D One network frame
A clock cycle is one tick of the CPU clock that synchronizes internal operations. Instructions are completed using one or more clock cycles depending on CPU design and memory access.
A machine cycle commonly refers to
A Full software install
B Screen refresh event
C Basic CPU action
D Battery charging step
A machine cycle is a basic hardware operation like a memory read, memory write, or opcode fetch. A complete instruction often requires several machine cycles to finish.
Micro-operations are mainly used to describe
A Small internal actions
B Printer servicing steps
C File encryption methods
D Monitor brightness changes
Micro-operations are tiny steps such as “transfer register to ALU” or “increment PC.” They show how an instruction is carried out internally, making CPU behavior easy to explain at low level.
Which performance factor increases when a CPU has more cores and software can run tasks in parallel
A Latency
B Pixel density
C Disk fragmentation
D Throughput
More cores can process multiple tasks simultaneously, improving total work done per time. This increases throughput for parallel workloads, though single-thread tasks may not improve much.
Latency mainly measures
A Task completion count
B Total cache capacity
C Delay before response
D CPU fan speed
Latency is the waiting time from a request until the response begins. Lower latency improves responsiveness, especially in memory access, storage operations, and real-time computing tasks.
Which term roughly measures million instructions executed per second
A FLOPS
B MIPS
C DPI
D RPM
MIPS means Million Instructions Per Second and provides a rough speed estimate. It is not always reliable across different architectures because instruction complexity and execution time can vary.
FLOPS is mainly used for measuring performance in
A Floating-point math
B Text editing tasks
C Printing speed
D Keyboard response
FLOPS measures floating-point operations per second, important in scientific computing, simulations, and graphics. It indicates how quickly a processor can perform decimal-based mathematical calculations.
A bottleneck in a computer system means
A More memory added
B CPU always idle
C One part slows all
D Cache always empty
A bottleneck occurs when a slow component like storage, memory, or bus limits overall performance. Even if the CPU is fast, the whole system slows while waiting for that component.
Benchmarking is mainly done to
A Clean system files
B Fix hardware damage
C Increase memory size
D Compare system speed
Benchmarking runs standard tests to measure performance under known workloads. It helps compare CPUs or systems objectively, though results depend on test type, configuration, and workload similarity.
RISC architecture generally emphasizes
A Complex decoding
B Simple instructions
C No registers used
D Slow clock cycles
RISC uses simpler instructions, often fixed-length, enabling easier pipelining and faster execution. It typically relies heavily on registers and may need more instructions to perform complex operations.
CISC architecture is known for
A Few addressing modes
B No memory access
C Complex instructions
D Only simple opcodes
CISC includes more complex instructions that can do multiple operations. This may reduce instruction count, but it often increases decoding complexity and can make pipelining more difficult.
An I/O interface is primarily used to
A Connect devices safely
B Increase CPU speed
C Store firmware code
D Improve monitor contrast
I/O interfaces manage communication between the system bus and external devices. They handle control signals, buffering, and speed matching so slow peripherals can exchange data reliably with the CPU.
DMA allows devices to
A Execute instructions
B Increase cache hits
C Decode opcodes faster
D Transfer data directly
DMA enables an I/O device to transfer data between itself and main memory without CPU handling every byte. The CPU is only interrupted when the transfer completes or needs attention.
A hardware interrupt is usually generated by
A OS update process
B File rename action
C Device event signal
D Text editor command
Hardware interrupts come from devices like keyboards, timers, or network cards. They notify the CPU that immediate service is required, allowing efficient event handling without constant device polling.
Software interrupts are commonly used for
A Cooling control
B System calls
C Screen rendering
D Disk partitioning
Software interrupts are triggered by instructions to request operating system services. They provide a controlled method for programs to access privileged functions like file I/O, memory services, and device operations.
Immediate addressing mode means the operand is
A In memory only
B In disk sector
C A constant value
D In cache line
Immediate addressing includes the actual operand value inside the instruction. It avoids an extra memory access for the operand, making it fast for constants, but limited by instruction field size.
Direct addressing mode means the instruction contains
A Operand address itself
B Operand in register
C Cache replacement rule
D CPU clock timing
In direct addressing, the instruction contains the memory address where the operand is stored. The CPU uses that address to fetch the operand from memory during execution.
Indirect addressing mode uses
A Fixed cache line
B Pointer to address
C Operand in opcode
D Address in ALU
Indirect addressing uses an address that points to another address holding the operand’s location. This supports pointers and dynamic structures, but usually requires extra memory access, increasing execution time.
Register addressing mode means the operand is located in
A RAM chip
B SSD block
C ROM page
D CPU register
Register addressing uses operands stored in CPU registers. Since registers are extremely fast, this mode reduces memory access and speeds up execution for many instructions.
The stored-program concept mainly states that
A Programs stored on disk
B Programs stored on printer
C Programs stored in memory
D Programs stored in keyboard
Stored-program design keeps program instructions in main memory along with data. The CPU fetches and executes instructions from memory, enabling flexible and general-purpose computing.
Instruction Set Architecture (ISA) defines
A Software-hardware interface
B Cooling fan design
C Screen color depth
D Network addressing rules
ISA specifies the instruction set, registers, data types, and addressing modes visible to software. It is the contract that allows compiled programs to run on processors implementing that ISA.
A microprocessor is typically
A RAM inside case
B Disk storage method
C Monitor control board
D CPU on one chip
A microprocessor integrates CPU functions onto a single integrated circuit. It usually depends on external memory and peripherals and is used in general-purpose computing systems.
A microcontroller usually includes
A Only ALU block
B Only cache memory
C CPU plus memory
D Only output ports
Microcontrollers integrate CPU, memory, and I/O peripherals on one chip. They are designed for embedded control applications like sensors, appliances, and automation where compact and efficient control is needed.
Multiprocessor systems are mainly used to
A Reduce storage cost
B Run tasks in parallel
C Lower monitor size
D Remove interrupts
Multiprocessor systems use multiple processors to share workload. This improves throughput for parallel tasks and can increase reliability, especially in servers and high-performance computing environments.
Direct-mapped cache places each memory block into
A One fixed line
B Any cache line
C Any cache set
D Any register slot
In direct mapping, a memory block has exactly one possible cache location based on its address. This is simple and fast, but it can cause conflicts when multiple blocks map to the same line.
Set-associative cache allows a memory block to be stored in
A One line only
B Only main memory
C One set lines
D Only ROM area
Set-associative cache divides cache into sets. A block maps to one set but can be placed in any line in that set, reducing conflicts compared to direct-mapped mapping.