Chapter 5: Number System and Digital Logic (Set-2)
A number written as 4A₁₆ uses which base for place values
A Powers of 2
B Powers of 16
C Powers of 10
D Powers of 8
In hexadecimal, each position has weight 16⁰, 16¹, 16², and so on. That place-value system is what makes base-16 numbers represent values compactly.
In any base-N system, the rightmost digit position has weight
A N¹
B N²
C N⁰
D N⁻¹
The least significant position always represents base⁰, which equals 1. That is why the rightmost digit contributes its face value directly to the total.
Which is a valid octal digit
A 7
B 8
C 9
D A
Octal is base-8, so allowed digits are 0 through 7 only. Digits 8 and 9 are not valid in octal representation.
Which is a valid hexadecimal digit
A G
B 16
C 2
D F
Hexadecimal digits include 0–9 and A–F. The symbol F represents decimal 15, and it is the highest single digit in base-16.
The “most significant bit” is the bit with
A Lowest place value
B Highest place value
C Middle place value
D No place value
MSB is the leftmost bit in a fixed-length binary number. It carries the greatest weight and, in signed numbers, often acts as the sign indicator.
Which notation commonly indicates octal in many languages
A 0x
B 0b
C 0o
D 0d
The prefix 0o is widely used to explicitly show an octal literal. It prevents confusion with decimal values and makes the base clear while reading code.
In binary, the place values from right to left are
A Powers of 10
B Powers of 8
C Powers of 16
D Powers of 2
Binary is base-2, so each move left doubles the weight. The positions represent 1, 2, 4, 8, 16, and so on.
Convert decimal 18 to binary
A 10100
B 10010
C 11000
D 01010
18 = 16 + 2. In binary, set the 16 and 2 positions to 1 and others to 0, giving 10010₂.
Convert binary 100000 to decimal
A 16
B 64
C 32
D 48
100000₂ has a 1 in the 2⁵ position. Since 2⁵ = 32, the decimal value is 32.
Convert decimal 45 to hexadecimal
A 2B
B 2D
C 3A
D 1F
45 ÷ 16 = 2 remainder 13. Remainder 13 is B in hex. So the hex form is 2B₁₆.
Convert hexadecimal 3C to decimal
A 48
B 64
C 36
D 60
3C₁₆ = 3×16 + 12. Since C is 12, total is 48 + 12 = 60.
Convert binary 1001 to octal
A 12
B 11
C 14
D 15
Group binary in 3s from right: 1001 → 001 001. Each group is 1, so octal becomes 11₈.
Convert octal 25 to binary
A 101001
B 110010
C 100101
D 111000
Each octal digit maps to 3 bits: 2 → 010 and 5 → 101. So 25₈ becomes 010101₂, which is 10101₂; with 6 bits: 100101₂.
Binary subtraction: 1000 − 0001 equals
A 0110
B 1001
C 1111
D 0111
8 − 1 = 7. In binary, 7 is 0111. Borrow occurs from the leftmost 1 to complete the subtraction.
When a binary subtraction needs borrowing, it is similar to
A Borrowing in decimal
B Multiplying digits
C Carrying in addition
D Ignoring place values
Borrowing in binary follows the same idea as decimal: you take 1 from the next higher place, which equals 2 in the current place, and continue the subtraction.
Binary multiplication is mainly repeated
A Subtraction steps
B Addition steps
C Division steps
D Complement steps
Binary multiplication forms partial products (0 or shifted copies) and adds them. The process is simpler because each bit is only 0 or 1.
Binary division is mainly repeated
A Addition
B XOR
C Subtraction
D NOT
Division repeatedly subtracts the divisor from the current remainder or uses subtraction-like comparisons. The quotient is built bit by bit based on whether subtraction is possible.
In 2’s complement, negative numbers are formed by
A Adding 2 always
B Flipping bits only
C Shifting left once
D Flip then add 1
2’s complement method: invert all bits (1’s complement) and add 1. This gives a unique zero and supports easy addition/subtraction with the same adder circuit.
In 2’s complement, subtraction A − B can be done as
A A + B
B A + (2’s comp B)
C A − (1’s comp B)
D A ÷ B
To subtract B, add the 2’s complement of B to A. The same binary adder hardware can perform subtraction without a separate subtractor circuit.
In 2’s complement, how many representations of zero exist
A Two forms
B Three forms
C One only
D Four forms
2’s complement has a single zero pattern: all bits 0. This avoids the “+0 and −0” problem seen in 1’s complement and simplifies comparisons.
For 4-bit 2’s complement, the smallest value is
A −7
B −15
C 0
D −8
Range for n-bit 2’s complement is −2^(n−1) to 2^(n−1)−1. For 4 bits, it becomes −8 to +7.
Sign extension of 1010 (4-bit signed) to 8 bits becomes
A 00001010
B 11111010
C 00001011
D 11110100
1010 as 4-bit 2’s complement is negative (MSB=1). Sign extension repeats the sign bit, so it becomes 11111010, keeping the same signed value.
A carry out of MSB in unsigned addition indicates
A Overflow beyond range
B No issue always
C Sign bit changes
D Parity becomes odd
In unsigned arithmetic, a final carry means the true sum needs more bits than available. The fixed-width result wraps, so the carry signals overflow.
In 2’s complement signed addition, overflow occurs when
A Any carry happens
B Inputs different sign, result same
C Inputs same sign, result different
D MSB is always 1
If two positives produce a negative, or two negatives produce a positive, the result cannot fit in the signed range. That sign change indicates overflow.
A logic gate output depends on
A Random choice
B File type used
C Screen resolution
D Input logic levels
Logic gates are digital circuits that produce outputs based on inputs being 0 or 1. Their behavior is fixed and described using truth tables.
For a 2-input AND gate, output is 1 for
A 00 only
B 11 only
C 01 only
D 10 only
AND requires all inputs to be 1. With two inputs, only the combination 11 produces output 1; all other combinations give 0.
For a 2-input OR gate, output is 0 for
A 01 only
B 10 only
C 00 only
D 11 only
OR outputs 1 if any input is 1. Only when both inputs are 0 does OR output 0.
XOR output for inputs 1 and 1 is
A 1
B Carry 1
C Undefined
D 0
XOR is 1 only when inputs differ. When both inputs are 1, they are the same, so XOR outputs 0.
NAND output for inputs 1 and 1 is
A 1
B 0
C 10
D 11
NAND is NOT(AND). AND(1,1)=1, then NOT makes it 0. For all other input pairs, AND is 0 and NAND becomes 1.
NOR output for inputs 0 and 0 is
A 0
B 10
C 1
D 11
NOR is NOT(OR). OR(0,0)=0, then NOT makes it 1. Any input with 1 makes OR=1 and NOR=0.
Which gate is easiest to build an inverter using same gate type
A NAND
B AND
C OR
D XOR
Tie both NAND inputs together: output becomes NOT(A). This shows NAND’s flexibility and why it is called a universal gate in digital circuit design.
Truth table rows for 3 inputs are
A 6
B 9
C 16
D 8
With n inputs, there are 2ⁿ possible input combinations. For 3 inputs, 2³ = 8 rows are needed to list every case.
Boolean expression uses operators mainly
A +, − only
B ×, ÷ only
C AND, OR, NOT
D <, > only
Boolean algebra is built on logical operations. AND combines conditions, OR merges alternatives, and NOT complements a variable, enabling analysis and simplification of logic circuits.
Commutative law example for OR is
A A+(B+C)=(A+B)+C
B A+B=B+A
C A(B+C)=AB+AC
D A+AB=A
Commutative law means order doesn’t matter. For OR, A+B equals B+A. The same idea holds for AND: A·B equals B·A.
Associative law example for AND is
A A·B=B·A
B A·0=0
C A+A=A
D A·(B·C)=(A·B)·C
Associative law means grouping doesn’t change the result. For AND, multiplying three variables can be grouped either way with the same output.
Distributive law example is
A A+B=B+A
B (A·B)’=A’+B’
C A·(B+C)=AB+AC
D A·1=A
Distributive law lets AND distribute over OR (and OR distribute over AND in Boolean algebra). It is heavily used to expand or factor expressions for simplification.
Simplify: A + A·B equals
A A·B
B A
C B
D A+B
By absorption law, A + A·B simplifies to A. If A is 1, output is 1 anyway; if A is 0, both terms are 0.
Simplify: A·(A + B) equals
A B
B A·B
C A+B
D A
Using absorption, A·(A+B) simplifies to A. When A is 1, the product is 1; when A is 0, the product is 0, regardless of B.
A canonical SOP form is a sum of
A Maxterms
B Complements only
C Minterms
D Constants only
Canonical Sum of Products expresses a function as OR of minterms. Each minterm corresponds to an input combination where the function output is 1.
A canonical POS form is a product of
A Maxterms
B Minterms
C XOR terms
D NAND terms
Canonical Product of Sums expresses a function as AND of maxterms. Each maxterm corresponds to an input combination where the function output is 0.
Karnaugh map is mainly used to
A Store data permanently
B Simplify Boolean logic
C Increase clock speed
D Draw CPU diagrams
A K-map visually groups adjacent 1s (or 0s) to reduce terms. It helps produce simpler expressions, which often means fewer gates and lower hardware cost.
A half adder adds
A Three input bits
B Four input bits
C Eight input bits
D Two input bits
Half adder adds two 1-bit inputs and produces Sum and Carry outputs. It does not accept a carry-in, so it is used as a basic building block.
Half adder outputs are
A Sum and Borrow
B Carry and Borrow
C Sum and Carry
D Parity and Sum
The sum bit is produced by XOR, and carry by AND. These two outputs together represent the result of adding two single-bit binary numbers.
A full adder adds
A Two bits only
B Two bits, carry
C One bit only
D Eight bits only
Full adder adds A, B, and a carry-in. It outputs Sum and Carry-out, allowing multiple adders to be chained for multi-bit addition.
A multiplexer mainly works as a
A Data selector
B Data storage
C Error corrector
D Clock generator
A multiplexer chooses one input line and forwards it to the output based on select lines. It reduces wiring by routing many signals through one output path.
A demultiplexer mainly works as a
A Many-to-one selector
B One-to-many distributor
C Memory cell
D Parity generator
A demultiplexer takes one input and routes it to one of many outputs based on select lines. It is used in data distribution and addressing circuits.
A decoder converts
A Many outputs to one
B Analog to digital
C Text to ASCII
D Binary input to line
A decoder activates one output line based on the binary input value. For example, a 2-to-4 decoder has 2 input bits and 4 possible active outputs.
An encoder converts
A Code to many lines
B Decimal to float
C One active line to code
D ASCII to Unicode
An encoder takes one active input line and produces a binary code at its outputs. It is the reverse idea of a decoder, often used in keyboards and priority circuits.
ASCII basic form uses how many bits
A 5 bits
B 7 bits
C 6 bits
D 8 bits
Standard ASCII represents 128 characters, which needs 7 bits (2⁷ = 128). Extended ASCII variants may use 8 bits, but basic ASCII is 7-bit.
A parity bit with even parity ensures
A Total 1s odd
B Total 0s even
C Total bits prime
D Total 1s even
Even parity adds a bit so the total number of 1s (data + parity) becomes even. The receiver checks parity to detect many single-bit errors during transmission.