Chapter 4: Computer Organization and Architecture (Set-3)
In a typical desktop computer, which part mainly coordinates data exchange between CPU, memory, and devices using buses
A Motherboard chipset
B System unit
C Output device
D Storage drive
The chipset manages communication between CPU, RAM, storage, and I/O interfaces through system buses. It helps control data flow, timing, and device coordination so the whole system works smoothly.
Which functional unit is responsible for converting typed characters into binary codes for processing
A Output unit
B Memory unit
C Input unit
D Control unit
Input devices like keyboards send signals that the input unit converts into machine-readable binary codes. These codes are then stored or processed by the CPU to perform the requested task.
Which unit stores both data and instructions while a program is actively running
A Secondary storage
B Output unit
C Control unit
D Main memory
Main memory (RAM) keeps currently used instructions and data for fast CPU access. It is volatile and loses content after power off, but it supports smooth execution of running programs.
When a CPU needs a frequently used value immediately, it is most likely kept in
A Registers
B DVD drive
C Hard disk
D Network card
Registers are the fastest storage locations inside the CPU. They hold operands, addresses, and intermediate results so the CPU can execute instructions quickly without waiting for slower memory.
In simple terms, the control unit mainly decides
A Screen color output
B File compression method
C What happens next
D Speaker sound level
The control unit fetches and decodes instructions, then sends control signals to registers, ALU, memory, and I/O. It controls the sequence and timing of operations for correct execution.
Which CPU part performs comparisons like equal-to or greater-than
A ALU
B Cache memory
C System bus
D ROM chip
The ALU performs arithmetic operations and logical comparisons. These comparisons set flags used by branch instructions, enabling decisions like jumping based on whether two values are equal.
Which is the correct role of the Program Counter during program execution
A Stores final output
B Stores instruction result
C Holds next address
D Holds memory data
The Program Counter stores the address of the next instruction to fetch. It normally increments sequentially, but it may change during jumps, calls, or interrupts to control program flow.
Which register usually keeps the instruction currently being decoded by the control unit
A Memory Address Register
B Instruction Register
C Memory Data Register
D Stack Pointer
The Instruction Register holds the fetched instruction so the control unit can decode it. Decoding determines required operations and operands, then the CPU executes the instruction step by step.
Which register typically stores the memory location address for a read or write operation
A MDR
B IR
C Accumulator
D MAR
The Memory Address Register holds the target address in memory. When the CPU reads or writes data, the MAR points to the exact location, enabling correct memory access.
Which register typically holds the data being transferred to or from main memory
A IR
B PC
C MDR
D CU
The Memory Data Register holds the actual data value during memory transfers. It receives data from memory on a read, or it provides data to memory on a write operation.
Which unit is best for storing large files permanently, such as videos and documents
A Secondary storage
B Cache memory
C Registers
D CPU core
Secondary storage like HDDs and SSDs is non-volatile and retains data without power. It provides large capacity for files and software, though it is slower than RAM and cache.
Which memory is generally fastest after CPU registers
A Hard disk
B Optical disk
C Tape storage
D Cache memory
Cache memory sits close to the CPU and stores frequently used data and instructions. It reduces average memory access time by avoiding slower RAM access for many repeated operations.
Which memory type is volatile and used as main working memory
A ROM
B SSD
C RAM
D Blu-ray
RAM temporarily stores programs and data that are currently in use. It is fast but volatile, so contents disappear when power is off, unlike ROM or secondary storage.
ROM is mainly used to store
A Temporary variables
B Firmware instructions
C Cache lines only
D User documents
ROM stores permanent startup firmware such as BIOS/UEFI. It stays available without power, allowing the system to initialize hardware and begin the boot process before loading the operating system.
Virtual memory allows a system to
A Increase screen size
B Increase CPU cores
C Use disk as RAM
D Remove cache memory
Virtual memory uses secondary storage to extend available memory space. When RAM is full, pages are swapped between disk and RAM, allowing larger programs to run, but with slower access.
Memory hierarchy is designed mainly to
A Balance speed and cost
B Reduce electricity use
C Improve monitor colors
D Increase keyboard buttons
Fast memory is expensive and small, while slow storage is cheap and large. Memory hierarchy combines registers, cache, RAM, and storage to achieve good speed with reasonable cost and capacity.
In the instruction cycle, the fetch stage primarily
A Writes final output
B Executes ALU work
C Clears cache
D Reads instruction
During fetch, the CPU reads the next instruction from memory using the Program Counter and loads it into the Instruction Register. This prepares the instruction for decoding and execution.
The opcode field of an instruction tells the CPU
A Where data is stored
B How much RAM exists
C Which operation to do
D Which keyboard is used
Opcode specifies the operation such as add, load, store, or branch. The control unit decodes the opcode and generates the control signals needed to perform that operation correctly.
Which stage of the instruction cycle interprets the instruction meaning
A Decode stage
B Fetch stage
C Execute stage
D Store stage
In decode, the control unit examines the instruction bits to determine operation type, operands, and addressing. It then plans the micro-operations and control signals required for execution.
Which stage usually performs the actual operation requested by the instruction
A Decode stage
B Fetch stage
C Execute stage
D Store stage
Execute stage performs the instruction’s core work, such as ALU computation, memory access, or branching. It uses registers and control signals to complete the requested action.
Which stage commonly writes results back to a register or memory
A Decode stage
B Fetch stage
C Power stage
D Store stage
Store or write-back updates the destination with the computed result. This may be a CPU register or a memory location, ensuring the instruction’s effect becomes part of system state.
A clock cycle is best described as
A Disk formatting step
B One full program run
C Basic timing pulse
D One internet request
A clock cycle is one tick of the CPU clock used to synchronize internal actions. Many instructions require multiple clock cycles depending on complexity and memory access requirements.
Micro-operations are
A Internal CPU steps
B Program bugs
C Network messages
D Printer settings
Micro-operations are small actions like loading registers, incrementing PC, or transferring data on buses. A single machine instruction is completed through a sequence of these micro-operations.
Which measurement indicates how many clock cycles occur per second
A Cache size
B Bus length
C Clock speed
D Disk space
Clock speed, measured in MHz or GHz, tells how fast the CPU clock ticks. It impacts how quickly basic CPU steps occur, though overall performance also depends on architecture and memory.
CPU word length generally refers to
A Monitor width
B Bits handled together
C Keyboard layout size
D Number of fans
Word length is the number of bits the CPU processes as a unit, such as 32-bit or 64-bit. It affects register size, data range, and address handling capabilities.
Which factor most directly improves multitasking performance when software supports parallel work
A Bigger monitor
B Larger keyboard
C More speakers
D More cores
More CPU cores allow true parallel execution of tasks or threads. If software can split work across cores, throughput improves because multiple instruction streams are processed simultaneously.
A thread is best described as
A Disk sector
B Cache line
C Execution sequence
D Bus signal
A thread is a flow of execution within a program. Multiple threads can run concurrently on multi-core or multi-threaded CPUs, improving responsiveness and better utilizing CPU resources.
Throughput means
A Work per time
B Delay time
C Memory address count
D CPU temperature
Throughput measures how much work is completed in a given time, such as tasks per second. Higher throughput often comes from parallelism, caching, and avoiding bottlenecks like slow I/O.
Latency is
A Total memory size
B Number of instructions
C Waiting delay
D Screen height
Latency is the delay between a request and the start of the response. Lower latency improves system responsiveness, especially for frequent memory accesses and real-time device interactions.
MIPS is used as a rough measure of
A Storage capacity
B Instruction rate
C Screen quality
D Printer speed
MIPS means Million Instructions Per Second. It estimates instruction execution rate, but it is not always reliable for comparing different CPUs because instruction complexity and architectures vary widely.
FLOPS mainly measures
A Text operations speed
B File copy accuracy
C Floating math rate
D Disk partition count
FLOPS measures floating-point operations per second, important in scientific and graphics workloads. Higher FLOPS indicates stronger capability for heavy mathematical calculations, often used to evaluate CPUs/GPUs.
Benchmarking is best described as
A Standard performance test
B Cleaning computer
C Editing documents
D Resetting BIOS
Benchmarking runs known workloads to measure and compare system performance. It helps identify how fast a CPU or system performs tasks, but results depend on the test type and configuration.
A bottleneck happens when
A All parts equally fast
B Disk becomes empty
C One part limits system
D Monitor turns off
A bottleneck is a slow component that restricts overall speed, such as slow RAM, storage, or bus. Even with a fast CPU, performance drops if it must wait on the bottleneck.
RISC processors generally prefer
A Complex instructions
B No registers used
C No pipelining used
D Simple instructions
RISC uses simple, often fixed-length instructions that execute efficiently and support pipelining. The design relies on registers and efficient instruction flow, often needing more instructions for complex tasks.
CISC processors are known for
A Complex instructions
B Few instruction types
C No memory access
D Only one core
CISC includes instructions that can perform multiple steps in one instruction, such as memory access plus arithmetic. This can reduce instruction count, but often makes decoding and pipelining more complex.
The system bus is mainly divided into
A Audio and video
B RAM and ROM
C Data, address, control
D Input and output
System bus includes the data bus (values), address bus (locations), and control bus (signals). Together they allow CPU, memory, and devices to communicate reliably during reads, writes, and control actions.
DMA is mainly used to
A Speed CPU decoding
B Transfer data without CPU
C Increase cache size
D Reduce clock speed
Direct Memory Access allows devices to move data directly to or from main memory. It reduces CPU involvement in bulk transfers, improving overall system efficiency and I/O performance.
A hardware interrupt is typically generated by
A Running a program
B Changing wallpaper
C External device signal
D Saving a file
Hardware interrupts come from devices like keyboard, timer, disk, or network card. They alert the CPU that an event needs immediate attention, improving responsiveness without constant polling.
Software interrupt is commonly used for
A Fan control request
B Screen calibration
C Disk defragmentation
D System call request
Software interrupts are triggered by special instructions to request operating system services. They provide a controlled way for programs to access privileged operations like file handling or device services.
Immediate addressing mode means
A Operand in disk
B Operand in cache
C Operand is constant
D Operand is address
Immediate addressing places the operand value within the instruction itself. This avoids extra memory reads for the operand, making it fast for constants, though limited by instruction size.
Direct addressing mode means
A Operand in register
B Address given directly
C Operand equals opcode
D Address in printer
Direct addressing includes the operand’s memory address in the instruction. The CPU uses that address to access the operand, making addressing easy but requiring a memory access for the data.
Indirect addressing mode means
A Operand in instruction
B Data always in register
C Address stored in address
D Address never used
Indirect addressing uses a pointer: the instruction gives an address that holds the actual effective address. This adds flexibility for arrays and pointers, but usually needs extra memory access.
Register addressing mode uses
A Register operand
B Main memory operand
C Disk operand
D ROM operand
Register addressing specifies that the operand is inside a CPU register. This is faster than memory addressing because registers have the quickest access, improving instruction execution speed.
Stored-program concept mainly states that
A Programs stored on monitor
B Programs stored in keyboard
C Programs stored in memory
D Programs stored in printer
Stored-program concept means program instructions are stored in memory along with data. The CPU fetches and executes instructions from memory, enabling easy program changes and flexible general-purpose computing.
Instruction Set Architecture (ISA) defines
A CPU fan layout
B Keyboard shortcuts list
C Monitor settings menu
D Programmer visible rules
ISA defines the instruction set, registers, addressing modes, and data formats visible to programmers. It is the interface between software and hardware that ensures code runs on compatible processors.
A microprocessor is best described as
A RAM storage device
B CPU chip only
C Hard disk controller
D Input device board
A microprocessor contains the CPU on a single chip and typically relies on external memory and peripherals. It is used in computers for general processing tasks requiring flexible computation.
A microcontroller usually integrates
A Only cache memory
B Only ALU unit
C CPU with peripherals
D Only display unit
Microcontrollers combine CPU, memory, and I/O peripherals on one chip. They are used in embedded systems like appliances and sensors where compact size, low cost, and control functions are needed.
Multiprocessor system means
A Multiple processors used
B One CPU, many RAM
C Many keyboards attached
D Multiple monitors used
A multiprocessor system uses more than one processor to share workload. It supports parallel processing, improving performance for multi-threaded tasks and increasing reliability in many server environments.
Direct-mapped cache means a memory block goes to
A Any cache line
B Any set line
C One fixed line
D Two random lines
In direct mapping, each memory block maps to exactly one cache line based on its address. This is simple and fast but can cause conflict misses if blocks compete for the same line.
Set-associative cache allows a block to be placed in
A One line only
B Only main memory
C Only CPU register
D A chosen set lines
Set-associative cache divides cache into sets. A memory block maps to one set but can be placed in any line within that set, reducing conflicts compared to direct-mapped cache.